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Advance Data Sheet December 1999
W3020 GSM Multiband RF Transceiver
Features
n n
Applications
n
2.7 V operation, low power consumption Integrated receive, transmit, and synthesizer functions IF frequency and transmit offset frequency generated from the same LO Integrated dual LNAs and mixers Minimizes PCB design work between systems Surface-mount, 64-pin TQFPT package
GSM1800/1900
GSM dual-band hand portables: -- GSM900/1800 -- GSM900/1900 GSM single-band hand portables: -- GSM900 -- GSM1800 -- GSM1900
n
n
n n n
ADC IF 270 MHz
RX I
GSM900 SAW VCO 900: 1150 MHz--1230 MHz 1800: 1530 MHz--1610 MHz 1900: 1660 MHz--1730 MHz
/2
ADC
RX Q
900: 925 MHz--960 MHz 1800: 1805 MHz--1880 MHz 1900: 1930 MHz--1990 MHz
RF MODE & AGC CONTROL LO2 PLL
540 MHz VCO
W3000 FREQUENCY SYNTHESIZER
900: 880 MHz--915 MHz 1800: 1710 MHz--1785 MHz 1900: 1850 MHz--1910 MHz GSM1800/1900
TX IF 1800/1900: 180 MHz DAC TX I
PA GSM900 Note: shaded area is off-chip. 900: 270 MHz
/2 /3
SWITCHED DIVIDER
DAC
TX Q
Figure 1. W3020 Circuit Block Diagram
W3020 GSM Multiband RF Transceiver
Advance Data Sheet December 1999
Table of Contents
Contents Page Contents Page
Features................................................................. 1 Applications ........................................................... 1 Description............................................................. 4 Detailed Block Diagram ...................................... 5 Pin Information....................................................... 6 Absolute Maximum Ratings.................................... 8 ESD Precautions.................................................... 8 Operating Range.................................................... 8 Digital Serial Inputs ................................................ 9 Digital Outputs ....................................................... 9 Enable Time........................................................... 9 Supply Currents ..................................................... 9 LNA...................................................................... 10 RF Mixer .............................................................. 11 IF/Baseband Amplifier.......................................... 12 Modulator............................................................. 15 LO2 Specification................................................. 17
LO1 Input Buffer Specification.............................. 17 Programming Information..................................... 18 Serial Bus Timing Information........................... 19 The Data Word ................................................. 20 TR Register....................................................... 21 CONFIG Register.............................................. 26 MAIN Register .................................................. 30 Filter Tune and dc Offset Correction Timing...... 31 Programming Example......................................... 33 Application Information......................................... 35 S-Parameters.................................................... 35 Outline Diagram ................................................... 43 64-Pin TQFPT .................................................. 43 Manufacturing Information.................................... 44 Evaluation Board Note.......................................... 44 Ordering Information ............................................ 44
List of Figures
Figure Page Figure Page
Figure 1. W3020 Circuit Block Diagram ................. 1 Figure 2. IC Block Diagram with Pinout .................. 5 Figure 3. IF Amplifier Gain Steps ......................... 12 Figure 4. Actual Gain vs. Requested Gain............ 12 Figure 5. IF Strip Balanced Input Matching Network ................................................ 12 Figure 6. IF Filtering Requirements for Wideband Noise Performance................................ 16
Figure 7. Diagram of W3020, W3000, and SC1 Interconnection...................................... 18 Figure 8. Serial Bus Timing Diagram .................... 19 Figure 9. IF and I/Q Gain Distribution (dB)............ 25 Figure 10. Programming the LO2 Phase Detector Slope.................................................... 29 Figure 11. GSM900 Smith Chart Noise Circles ..... 35 Figure 12. GSM1800 Smith Chart Noise Circles ... 36
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Lucent Technologies Inc.
Advance Data Sheet December 1999
W3020 GSM Multiband RF Transceiver
List of Tables
Table Page Table Page
Table 1. Pin Assignment.........................................6 Table 2. GSM900 LNA Performance.....................10 Table 3. GSM1800/1900 LNA Performance ..........10 Table 4. RF Performance: GSM900......................11 Table 5. RF Performance: GSM1800/1900 ...........11 Table 6. IF/Baseband Amplifier Performance .......13 Table 7. Low-Pass Rejection Characteristics.........14 Table 8. Modulator Performance...........................15 Table 9. LO2 Performance ...................................17 Table 10. LO1 Performance..................................17 Table 11. Serial Bus Timing Information ...............19 Table 12. Register Addressing ..............................20 Table 13. TR Register...........................................21 Table 14. B: Band Select ......................................22 Table 15. MO[3:1]: Mode Control..........................23 Table 16. T6: LO2 Disable ....................................23 Table 17. T5: LO1 Disable ....................................23 Table 18. T4: Receive IF Duty Cycle Corrector Disable..................................................23 Table 19. T3: Divide-by-3 Duty Cycle Corrector Disable..................................................23 Table 20. FTR: LPF Tune Filter Request ..............24 Table 21. DP: dc Precharge Only .........................24 Table 22. DS: dc Correction Skip..........................24 Table 23. T2: TX IF LO Division Select Switch .....24 Table 24. T1: TX IF LO Divide-by-6 Select ...........24 Table 25. T0: TX IF Duty Cycle Corrector Disable.24 Table 26. G[0:6]: Digital Gain Control ...................25 Table 27. CONFIG Register..................................26 Table 28. C10: LO2 PLL Enable ...........................27 Table 29. OLD: Overload Output Disable..............27 Table 30. C9: RF Mixer On During Settling...........27 Table 31. VO: LO1 Buffer Mode ...........................27 Table 32. C8: LO2 Charge Pump Off....................27 Table 33. LD2: Lock Detect Enable.......................28
Table 34. C7: dc Coarse/Fine Correction ............. 28 Table 35. C6: Filter Tune Disable......................... 28 Table 36. C5: dc Correction Disable..................... 28 Table 37. C4: Low-Pass Filter Bandwidth ............. 28 Table 38. C3: Receive LO1 Buffer Mode During dc Calibration............................................ 29 Table 39. C2: LNA Mode During dc Calibration .... 29 Table 40. C1: 540 MHz LO2 Phase Detector Polarity................................................. 29 Table 41. DT[2:0]: dc Correction Time ................. 30 Table 42. RS: Reset Bit Content .......................... 30 Table 43. Initialize CONFIG Register (Reset W3020) ..................................... 33 Table 44. Initialize TR Register ............................ 33 Table 45. Settle PLL to GSM1800 Band for Receive Mode (W3020/W3000) ......................... 33 Table 46. Perform Receive (W3020).................... 34 Table 47. Settle PLL in GSM1800 Band for Transmit Mode (W3020/W3000) .......... 34 Table 48. Basic GSM1800 Transmit Burst (W3020) ............................................... 34 Table 49. GSM900 LNA S-Parameters................. 37 Table 50. GSM1800/GSM1900 LNA S-Parameters ....................................... 38 Table 51. Receive IF Amplifier Input (0 dB Setting) ....................................... 39 Table 52. Receive IF Amplifier Input (32 dB Setting) ..................................... 39 Table 53. Transmit Modulator IF Output............... 40 Table 54. Transmit IF Input to Up-Conversion Mixer.................................................... 41 Table 55. Transmit RF Output from Up-Conversion Mixer.................................................... 42
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W3020 GSM Multiband RF Transceiver
Advance Data Sheet December 1999
passed through another external filter to attenuate the image frequency to an acceptable level. The signal passes through the RF down-conversion mixer to the IF frequency. It is then filtered by an external surface acoustic wave (SAW) filter to bring the in-band blocking signals to an acceptable level. The signal is amplified in the IF strip of the receiver. The IF strip contains digital gain control (DGC) amplifiers at both the IF and baseband frequencies and precision lowpass filters. This allows the signal to be amplified while in-band blocking signals are removed. The precision I/Q demodulator splits the signal into its inphase and quadrature signals. The I/Q signals are lowpass filtered and further amplified. The I/Q amplifier contains integrated dc offset calibration circuitry. The outputs (I/Q) are fed to the ADC for further signal processing. The second local oscillator (LO2), comprising a buffer for the external voltage-controlled oscillator (VCO) and a phase-locked loop (PLL), feeds the IF portions of both the modulator and the receiver. An external reference source, voltage-controlled crystal oscillator (VCXO), is divided from 13 MHz to 1 MHz through a counter. The 1 MHz is called the comparison frequency. The VCO frequency of 540 MHz is also divided down to 1 MHz. Both signals are fed into a phase detector, and the resultant error signal is fed through an external low-pass filter to the control input of the VCO. The RF receive and transmit mixers are driven by two band-switchable external VCO modules and buffered internally on the IC. The VCOs are both controlled by a single W3000 PLL synthesizer and loop filter. Fast band-locking is achieved using a proprietary scaling technique integrated in the W3000 PLL.
Description
The W3020 is a highly integrated GSM transceiver designed to operate in dual-band handsets or in single-band handsets operating at 900, 1800, and 1900 MHz frequency bands (1900 MHz performance is not verified in production). The IC architecture allows the RF designer to provide solutions for three different frequency bands with very few PCB changes, thereby providing faster time to market and reduced development time. The W3020 RF transceiver and W3000 PLL have been designed in conjunction with the SC1 (radio interface and DSP) to provide a complete GSM cellular solution. The W3020 interfaces to the W3000 UHF high-performance PLL IC. The W3020, in combination with the W3000, provides the transmitter, receiver, and frequency synthesizer. Adding a power amplifier(s), filters, and VCO modules completes the radio channel. The baseband modulated signal is applied to the I/Q double-balanced mixer in a differential manner. The 45 phase-shifted local oscillator requires no trim to achieve the required modulation spectral mask. Also, I/Q input signals require no dc offset calibration to achieve high phase accuracy signal. The IF signal outputs from the I/Q mixers are summed and brought out to an external filter that reduces the noise that could be intermodulated into the receive band. This signal is then applied to the low noise up-conversion mixer and brought to the RF output. The received signal is amplified through the low-noise amplifier, which, combined with the preceding filter, dominates the receiver sensitivity. The signal is then
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Lucent Technologies Inc.
Advance Data Sheet December 1999
W3020 GSM Multiband RF Transceiver
Description (continued)
Detailed Block Diagram
61 GLNAO 63 DLNAO 58 VDDR1 49 VDDR2 51 RMON 50 RMOP 52 TIFON 53 TIFOP 62 GNDL 59 TOUT 54 EER1
EEGND
LNA 1800
VCC B
VCCM RF MIXERS
BIAS
GND EEL[1:3]
55 GMIP
57 DMIP
64 EEL1
60 TOV
56 MIN
s
EEL2 1 DLNAI 2 EEL3 3 GLNAI 4 TX MIXER TIFIP 5 TIFIN 6
s
B
VCCB VCCB
48 GNDS3 47 RIP
VCCB GND
LNA 900
EEL[1:3]
46 RIN
G1 4 dB VCC GND G5 21 dB G2 G3 8 dB 16 dB VCC GND
VCC GND
45 RQP 44 RQN 43 VDD B 42 GNDB 41 TQN
MODULATOR
s
MUX
GNDS4 7 GNDP2 8 VDD P2 9 VDD C2 10 CP2 11 GNDC2 12 VDD L2 13 L2P 14 L2N 15 GNDL2 16
GND VCC GND VCC
G6 4 dB TIP TIN DIV BY 2 OR 3 TQP TQN
40 TQP 39 TIN 38 TIP
VCC
LO2 PLL
37 VDD I 36 GNDI 35 IFIP
LO2 BUFFER 540 MHz GSM 1800 GSM 900
VDD
DIV BY 2
G4 32 dB
GND
34 IFIN B G[0:6] TEST CONTROL LOGIC/ SERIAL BUS 33 TEST
s
VCC
GND
GND
LO2 LOCK
s
GNDS1 17
MCI 18
MCG 19
VDDL1 20
DL1P 21
DL1N 22
GNDL1 23
GL1P 24
GL1N 25
VDD 26
VSS 27
CLK 28
DAT 29
LAT 30
LD 31
Figure 2. IC Block Diagram with Pinout
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W3020 GSM Multiband RF Transceiver
Advance Data Sheet December 1999
Pin Information
Table 1. Pin Assignment Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Symbol EEL2 DLNAI EEL3 GLNAI TIFIP TIFIN GNDS4 GNDP2 VDDP2 VDDC2 CP2 GNDC2 VDDL2 L2P L2N GNDL2 GNDS1 MCI MCG VDDL1 DL1P DL1N GNDL1 GL1P GL1N VDD VSS CLK DAT LAT LD GNDS2 Type Input* Input Input* Input Input Input Pin Description LNA Emitter Ground GSM1800/1900 Band LNA Signal Input LNA Emitter Ground GSM900 Band LNA Signal Input TX IF Input to Mixer TX IF Input to Mixer
Ground Substrate Ground Ground LO2 PLL Ground Supply Supply Output Supply Input Input LO2 PLL Voltage Supply LO2 Charge Pump Supply Charge Pump LO2 Output LO2 Buffer Supply LO2 Positive Input (540 MHz) LO2 Negative Input (on-chip ac ground)
Ground LO2 Charge Pump Ground
Ground LO2 Buffer Ground Ground Substrate Ground Input Input Supply Input Input Input Input Supply Input Input Input Output Master Clock Input Master Clock Negative Input (ac ground) VDD Supply for LO1 GSM1800/1900 LO1 Positive Input GSM1800/1900 LO1 Negative Input (on-chip ac ground) GSM900 LO1 Positive Input GSM900 LO1 Negative Input (on-chip ac ground) Voltage Supply for All Digital Circuits Clock Input for Serial Bus Data Input for Serial Bus Latch Enable Input for Serial Bus LO2 Synthesizer Lock Indicator Output
Ground LO1 Ground
Ground Ground for All Digital Circuits
Ground Substrate Ground
*The emitters are considered critical inputs that need to be carefully grounded externally.
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Advance Data Sheet December 1999
W3020 GSM Multiband RF Transceiver
Pin Information (continued)
Table 1. Pin Assignment (continued) Pin 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 Symbol Test IFIN IFIP GNDI VDDI TIP TIN TQP TQN GNDB VDDB RQN RQP RIN RIP GNDS3 VDDR2 RMOP RMON TIFON TIFOP EER1 GMIP MIN DMIP VDDR1 TOUT TOV GLNAO GNDL DLNAO EEL1 Type Output Input Input Ground Supply Input Input Input Input Ground Supply Output Output Output Output Ground Supply Output Output Output Output Input* Input Input Input Supply Output Output Output Ground Output Input* Pin Description Production Test Output IF DGC Amplifier Input Negative IF DGC Amplifier Input Positive Ground for IF Amplifier Voltage Supply IF Amplifier TX In-Phase Positive Input TX In-Phase Negative Input TX Quadrature Positive Input TX Quadrature Negative Input Baseband RX Ground Baseband RX VDD Supply RX Quadrature Phase Negative Output RX Quadrature Phase Positive Output RX In-Phase Negative Output RX In-Phase Positive Output Substrate Ground RF dc Supply RF RX/TX Voltage Supply RX Mixer Output Positive RX Mixer Output Negative TX IF Output from Modulator Negative TX IF Output from Modulator Positive RX Mixer Emitter Ground GSM900 Mixer Input Positive RF Mixer Input Negative (ac ground) GSM1800 Mixer Input Positive RF RX Voltage Supply Transmit Mixer Output Transmit Mixer Output GSM Band LNA Output LNA Substrate Ground GSM1800 Band LNA Output LNA Emitter Ground
*The emitters are considered critical inputs that need to be carefully grounded externally.
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W3020 GSM Multiband RF Transceiver
Advance Data Sheet December 1999
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operations sections of this data sheet. Exposure to maximum ratings for extended periods can adversely affect device reliability. Parameter Ambient Operating Temperature Storage Temperature Lead Temperature (soldering, 10 s) Positive Supply Voltage Power Dissipation ac Peak-to-Peak Input Voltage Digital Voltages Symbol TA Tstg -- VDD PD Vp-p -- Min -30 -65 -- 0 -- 0 0 Max 85 150 300 4.5 550 VDD VDD Unit C C C V mW V V
ESD Precautions
Although protection circuitry has been designed into this device, proper precautions should be taken to avoid exposure to electrostatic discharge (ESD) during handling and mounting. Lucent Technologies Microelectronics Group employs a human-body model (HBM) and a charged-device model (CDM) for ESD-susceptibility testing and design evaluation. ESD voltage thresholds are dependent on the circuit parameters used to define the model. No industry-wide standard has been adopted for CDM. However, a standard HBM (resistance = 1500 , capacitance = 100 pF) is widely used and, therefore, can be used for comparison purposes. The HBM ESD threshold presented here was obtained by using these circuit parameters: Parameter ESD Threshold Voltage ESD Threshold Voltage (corner pins) ESD Threshold Voltage Method HBM CDM CDM Rating 1500 1000 500 Unit V V V
Operating Range
The device is fully functional within the following operation ranges. No claims of parametric performance are stated within this range. For parametric performance, refer to the individual specifications and operating conditions. Parameter Operating Temperature Nominal Operating Voltage Symbol TA VDD Min -30 2.7 Max 85 3.6 Unit C V
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Advance Data Sheet December 1999
W3020 GSM Multiband RF Transceiver
Digital Serial Inputs
Parameter Logic High Voltage Logic Low Voltage Logic High Current (VIH = 3.0 V) Logic Low Current (VIL = 0.0 V) Clock Input Frequency (VDD = 2.7 V) Symbol VIH VIL |IIH| |IIL| fCLK Min 0.7 * VDD -- -- -- -- Max -- 0.3 * VDD 10 10 10 Unit V V A A MHz
Digital Outputs
Parameter Logic High Voltage Logic Low Voltage Logic High Current (VOH VDD - 0.4) Logic Low Current (VOL 0.4 V) Symbol VOH VOL |IOH| |IOL| Min VDD - 0.4 -- 2 2 Max -- 0.4 -- -- Unit V V mA mA
Enable Time
VDD = 2.7 Vdc; TA = 25 C 3 C. Parameter Logic Powerup/down Time Min -- Typ -- Max 4.0 Unit s
Supply Currents
VDD = 2.7 Vdc; TA = 25 C 3 C. System Mode Powerdown (VDD = 3.0 Vdc)* PLL RX Settling RX Mode (LNA = ON) RX Mode (LNA = OFF) PLL TX Settling TX Mode Min -- -- -- -- -- -- Typ 2 33 68 64 33 92 Max 50 -- -- -- -- -- Unit A mA mA mA mA mA
*This current does not include LO2 charge pump supply current. (See LO2 specification for details.)
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W3020 GSM Multiband RF Transceiver
Advance Data Sheet December 1999
LNA
The W3020 contains two on-chip LNAs, one to operate in the GSM900 band and one to operate in the GSM1800/1900 bands. The GSM900 operation is combined with the GSM1800 band operation in a dual-band terminal. Only one LNA operates at a time. The two on-chip LNAs with external matching networks are 50 single-ended input, single-ended output type. Switching between the LNAs is determined by the band bit B and the gain control bit G0 in the TR register, as described in the Programming Information section. Table 2. GSM900 LNA Performance VDD = 2.7 Vdc; TA = 25 C 3 C. Parameter RF Input Band Current Consumption (collector current) Noise Figure* Power Gain (942 MHz)* Input 1 dB Compression Level Input Return Loss Off-state Gain
* All gain and NF include matching losses. Not tested in production.
Min 925 -- -- -- -20 -- --
Typ -- 3.5 2.0 20 -15 14 -51
Max 960 -- -- -- -- -- --
Unit MHz mA dB dB dBm dB dB
Table 3. GSM1800/1900 LNA Performance VDD = 2.7 Vdc; TA = 25 C 3 C. Parameter RF Input Band: GSM1800 GSM1900 Current Consumption (collector current) Noise Figure* Power Gain (1842 MHz)* Input 1 dB Compression Level Input Return Loss Off-state Gain
* All gain and NF include matching losses. Not tested production.
Min 1805 1930 -- -- -- -20 -- --
Typ -- -- 3.5 3.0 19 -16.5 15 -38
Max 1880 1990 -- -- -- -- -- --
Unit MHz MHz mA dB dB dBm dB dB
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Lucent Technologies Inc.
Advance Data Sheet December 1999
W3020 GSM Multiband RF Transceiver
RF Mixer
The W3020 contains two mixers: one for GSM900 band operation and one for GSM1800/1900 band operation. The RF mixers are double-balanced mixers that can be used in various modes of operation. The ac-grounded input (pin 56) requires grounding at both the RF and the IF frequencies. If grounding is not placed close to the device, the RF performance will be compromised. At the output, the mixer is connected to a balanced IF SAW filter. Table 4. RF Performance: GSM900 VDD = 2.7 V; TA = 25 C 3 C. FIN = 942 MHz Parameter RF Input Band Output IF Frequency LO Frequency Range Noise Figure (SSB) Mixer Power Gain* I/P 1 dB Compression
*LO1 level = -6 dBm, FLO = 1212 MHz, FIF= 270 MHz.
Min 925 -- 1195 -- -10
Typ -- 270 -- 9 7 -5
Max 960 -- 1230 12 --
Unit MHz MHz MHz dB dB dBm
Table 5. RF Performance: GSM1800/1900 VDD = 2.7 V; TA = 25 C 3 C. FIN = 1842 MHz Parameter RF Input Band: GSM1800 GSM1900 Output IF Frequency LO Frequency Range: GSM1800 GSM1900 Noise Figure (SSB) Mixer Power Gain* I/P 1 dB Compression
*LO1 level = -6 dBm, FLO = 1572 MHz, FIF = 270 MHz
Min 1805 1930 -- 1535 1660 -- 4 -12
Typ -- -- 270 -- -- 9.5 6 -7
Max 1880 1990 -- 1610 1720 12 -- --
Unit MHz MHz MHz MHz MHz dB dB dBm
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W3020 GSM Multiband RF Transceiver
Advance Data Sheet December 1999
gain accuracy is determined after calibration of the 32 dB amplifier.
ACTUAL = REQUESTED ACTUAL GAIN (dB) X Y ACTUAL GAIN
IF/Baseband Amplifier
The IF amplifier is a balanced-input/balanced-output type and is connected to a balanced SAW filter. It consists of three gain stages: an IF amplifier and two sections of baseband amplifiers. The gain can be changed in steps of 32, 16, 8, and 4 dB. The baseband also contains a level-shifter stage to drive an A/D converter directly. The level-shifter stage has 21 dB of gain that can be switched off. The specifications below are for the two modes of operation. The gain of the IF section is programmed via the three-wire serial bus. The IF amplifier contains the 32 dB amplifier stage and has a gain of either 0 or 32 dB. The IF amplifier is followed by a quadrature mixer with a fixed gain of 4 dB. The first baseband amplifier (G3, G2, G6) after the low-pass filter and demodulator has gains selectable between 0, 4, 8, 12, 16, 20, 24, and 28 dB. Using the other gain steps, the IF and baseband gain can be varied by 64 dB in 4 dB steps. The second baseband amplifier (G5, G1) has gains selectable between 0, 4, 21, and 25 dB. The 21 dB gain step in the second baseband amplifier section is not tested and should therefore not be used. Figure 3 is a diagram of the gain steps.
G4 LPF1 G3 G2 G6* LPF2 G5* G1
20 dB REQUESTED GAIN (dB) Note: X , Y = relative gain accuracy.
Figure 4. Actual Gain vs. Requested Gain The input impedance of the IF strip will vary slightly when the 32 dB amplifier is switched between the ON and OFF states. We recommend that the IF strip be matched with the 32 dB amplifier in the ON state to provide the best match to the SAW filter when the input level is at a minimum. The input matching network can match the IF input directly to the SAW filter or to 50 . A matching network to 50 was chosen for the evaluation board to allow for convenient laboratory measurements. To keep the input impedance low and minimize impedance variation between gain settings of the IF stage, a resistor is shunt-connected between the input terminals. The input network can then be matched to the desired input impedance. (The specified gain includes a resistor value of 500 .) For testing purposes, the input has been matched to 50 , and the gains of the IF/baseband amplifier are all referred to a 50 matched input impedance. The I/Q outputs are terminated in high-impedance loads. The gains are voltage gains and include the voltage gain in the impedance transformation of the input matching network. The network is illustrated in Figure 5.
W3020 G4 bit IFIP PIN 35 INPUT IMPEDANCE 50 1:1 IFIN PIN 34 Note: Balun is shown for testing purposes only. R1 500
32/0 *Not tested.
6
16/0
8/0
4/0
21/0
4/0
Figure 3. IF Amplifier Gain Steps The baseband amplifier section contains dc correction circuitry that minimizes dc offsets at the I/Q outputs. The low-pass filters in the baseband contain a selfcalibrating circuit for tuning of filter cut-off frequency. The selectable gain settings are programmed via the TR register as described in the Programming Information section. Filter tuning and dc calibration are also explained in that section. To achieve the specified absolute gain accuracy, the total gain should be calibrated at room temperature. This would normally be part of the overall phone calibration. Absolute gain accuracy measures the gain change over a specified temperature range relative to the room temperature measurement. In the GSM system, this specification is dependent on all the RX functional blocks and not solely on the IF strip. The relative gain accuracy is a measure of the gain stage accuracy over a 20 dB range (see Figure 4). Relative 12
32/0
Figure 5. IF Strip Balanced Input Matching Network Lucent Technologies Inc.
Advance Data Sheet December 1999
W3020 GSM Multiband RF Transceiver
IF/Baseband Amplifier (continued)
Table 6. IF/Baseband Amplifier Performance VDD = 2.7 V; TA = 25 C 3 C. Parameter Total Voltage Gain (referred to 50 input)* Demodulator Gain Absolute Gain Accuracy

Min 60 -- -2.0 -1.0 -- -- 12 -- -- 20 40 -- 0.5 * VDDB - 0.15 50 -- -1 -- -- -- --
Typ 65 4 -- -- 6.2 -1.5 -- -- -- -- -- -- 0.5 * VDDB -- 3.5 0.1 5 2 114 - j497 92 - j497
Max 68 -- 2.0 1.0 12 -- -- 10 10 -- -- -- 0.5 * VDDB + 0.15 -- -- 1 50 -- -- --
Unit dB dB dB dB dB dBm(V)** dBm(V)** pF pF k k s V A degrees dB mV mV/s
Relative Gain Step Accuracy
Noise Figure (matched to 50 )
O/P 1 dB Compression Point (0 dB gain setting) O/P 1 dB Compression Point (>16 dB baseband gain setting) Output Load Capacitance (differential) Output Load Capacitance (single-end to ground) Output Load Resistance (differential) Output Load Resistance (single-end to ground) IF Enable Time I/Q Common-mode Output Voltage I/Q Output Current I/Q Phase Accuracy I/Q Amplitude Mismatch I/Q Differential Offset Voltage (corrected) , Offset Correction Decay Rate IF Input Impedance (diffferential) 32 dB gain setting 0 dB gain setting

* 64 dB DGC setting. This voltage gain is measured from the input of the IF strip to either the I or Q channel output. The absolute accuracy refers to the total gain variation from the nominal condition over temperature (-30 C to +85 C) after gain calibration at nominal temperature. The relative gain step accuracy is determined after the 32 dB gain stage has been calibrated at nominal temperature. The total gain step accuracy at any of the possible gain conditions should not vary more than the specified amount within a 20 dB measurement window. At 64 dB gain setting. ** This is a voltage and specified in dBm as if the voltage were across a 50 load. Offset tested in coarse dc-correction mode only.
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W3020 GSM Multiband RF Transceiver
Advance Data Sheet December 1999
IF/Baseband Amplifier (continued)
Table 7. Low-Pass Rejection Characteristics VDD = 2.7 V; TA = 25 C 3 C; high bandwidth. Parameter Corner Frequency* Group Delay Distortion (0 kHz--75 kHz) Attenuation: 75 kHz 100 kHz 200 kHz 400 kHz 600 kHz 800 kHz 1.6 MHz 3.0 MHz Min 130 -- -- -- -- -- -- -- -- -- Typ 168 61 0.4 0.8 4.7 18 28 35 53 69 Max 226 -- -- -- -- -- -- -- -- -- Unit kHz ns dB dB dB dB dB dB dB dB
* After filter tuning. (See FilterTune and dc Offset Correction Tuning section.)
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Advance Data Sheet December 1999
W3020 GSM Multiband RF Transceiver
Modulator
The modulator uses an indirect I/Q modulator architecture that is ideal for multiband operation. The IF modulation improves EVM effects due to improved carrier feedthrough. The series transmit IF filters allow improved wideband noise, which enables duplexer removal. The I/Q modulator requires no amplitude or phase calibration to achieve high phase accuracy. The modulator can be altered between GSM900 transmit mode (TX IF = 270 MHz) and GSM1800/1900 transmit mode (TX IF = 180 MHz) by the band bit setting in the TR register. Table 8. Modulator Performance VDD = 2.7 V; TA = 25 C 3 C. IQ common mode = 1.6 V; input differential signal = 1.0 Vp-p. Parameter I/Q Signal Path Bandwidth I/Q Input Resistance to Ground I/Q Input Capacitance to Ground I/Q Input Resistance (differential) I/Q Input Capacitance (differential) I/Q Common-mode Range I/Q Input Differential Signal for Max Output RF Output Band: GSM900 GSM1800 GSM1900 Output Power: GSM900 (LO1 at 1167 MHz) GSM1800 (LO1 at 1567 MHz) Powerup Time* RMS Phase Accuracy: GSM900 GSM1800 GMSK Modulation Spectrum (max) (offset from carrier): 100 kHz @30 kHz RBW 200 kHz 250 kHz 400 kHz 1.8 MHz--3.0 MHz @100 kHz RBW 3.0 MHz--6.0 MHz >6.0 MHz Wideband Noise IF Modulator GSM900: |f - f0| 10 MHz |f - f0| 20 MHz (PM) GSM1800: |f - f0| 20 MHz (PM) Wideband Noise RF Mixer (See Figure 6.): GSM900: |f - f0| 10 MHz |f - f0| 20 MHz (PM) GSM1800: |f - f0| 20 MHz (PM) Min -- 25 -- 10 -- 1.5 0.8 880 1710 1850 -4.5 -4 -- -- -- -- -- -- -- -- -- -- Typ 450 -- -- -- -- -- 1 -- -- -- 0 0 -- 2.0 2.5 -- -- -- -- -- -- -- Max -- -- 10 -- 10 VDD - 1.05 1.2 915 1785 1910 6 6 4 -- -- 0.5 -30 -33 -60 -65 -65 -73 Unit kHz k pF k pF V Vp-p MHz MHz MHz dBm dBm s rms rms dBc dBc dBc dBc dBc dBc dBc
-- -- --
-140 -140 -140
-- -- --
dBc/Hz dBc/Hz dBc/Hz
-- -- --
-154 -154 -153
-- -- --
dBc/Hz dBc/Hz dBc/Hz
* From the programming latch going high to power available at RF output, Including TX IF filter group delay. Including contributions from LO1, LO2, and modulator.
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W3020 GSM Multiband RF Transceiver
Advance Data Sheet December 1999
Modulator (continued)
I
LO2
/2 /3
Q
OUTPUT
IL = 3 dB REJECTION = 34 dB @ 20 MHz OFFSET
LO1
Figure 6. IF Filtering Requirements for Wideband Noise Performance
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Lucent Technologies Inc.
Advance Data Sheet December 1999
W3020 GSM Multiband RF Transceiver
LO2 Specification
The W3020 contains an input buffer for an external VCO and a PLL for generation of a second LO signal at 540 MHz. The output of the buffer is fed to the receive and transmit circuits, where the signal is divided to the IF frequency. The phase noise includes contributions from VCO buffers to the transmit and receive circuits. Table 9. LO2 Performance VDD = 2.7 V; TA = 25 C 3 C. Parameter Charge Pump Supply (VDDC2) Frequency LO2 Input Level Clock Reference Frequency Clock Input Level Reference Frequency (at phase detector) Phase Accuracy (loop bandwidth 10 kHz) Phase Detector Gain (VDD = 2.85 V) Powerdown Charge Pump Supply Current (VDDC2) Phase Detector Voltage Min 2.7 -- -6 -- 0.4 -- -- -- -- 0.5 Typ 2.85 540 -3 13.0 1 1.0 1.3 200 -- 1.3 Max 3.0 -- 0 -- -- -- -- -- 1 VDDC2 - 0.5 Unit V MHz dBm MHz Vp-p MHz rms A/cycle mA V
Note: Reference sidebands determined by external loop filter components.
LO1 Input Buffer Specification
Table 10. LO1 Performance VDD = 2.7 V; TA = 25 C 3 C. Parameter Frequency Range: GSM900 GSM1800 GSM1900 Input Power Level Input Noise Figure Min 1150 1530 1660 -6 -- Typ -- -- -- -3 8 Max 1230 1610 1730 -- 10 Unit MHz MHz MHz dBm dB
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W3020 GSM Multiband RF Transceiver
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Programming Information
The W3020 and W3000 transceiver mode (IC RX/TX) and the gain and band settings are programmed using a standard three-wire bus (CLOCK, DATA, LATCH). The W3020 and W3000 registers are addressable so the two ICs can share the same data, clock, and latch times. The LATCH line initiates download and execution of the current DATA word.
CONFIG REGISTER
MAIN REGISTER
ADDRESS DECODER
TR REGISTER
A[0:2] PARALLEL LATCH SERIAL SHIFT W3020 DAT LAT CLK
SC1 SERLE1 SERCK SERDA
W3000 SERIAL SHIFT PARALLEL LATCH A[0:2] ADDRESS DECODER MAIN REGISTER
DAT CLK LAT
REF REGISTER
Figure 7. Diagram of W3020, W3000, and SC1 Interconnection
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W3020 GSM Multiband RF Transceiver
Programming Information (continued)
Serial Bus Timing Information
DAT MSB tCS CLK MSB - 1 tCH LSB
t LAT
L L
tCWL
tCWH
tLS
OR
tLWH V t
LAT
Figure 8. Serial Bus Timing Diagram
Table 11. Serial Bus Timing Information VDD = 2.7 V; TA = 25 C 3 C Symbol TCS TCH TCWH TCWL TLS TLWH TLL FCLK Parameter Data to Clock Setup Time Data to Clock Hold Time Clock Pulse Width High Clock Pulse Width Low Clock Falling Edge to Latch High Setup Time Latch Pulse Width Latch to Clock Setup Time Clock Input Frequency Min 33 10 33 33 0 50 33 -- Typ -- -- -- -- -- -- -- -- Max -- -- -- -- -- -- -- 10 Unit ns ns ns ns ns ns ns MHz
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W3020 GSM Multiband RF Transceiver
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Programming Information (continued)
The Data Word
The W3020 and W3000 chips are addressed through the bit content of the 24-bit serial word. Some words for time-critical interactions address both W3020 and W3000 at the same time, while some words for initialization address W3020 and W3000 separately. The W3020 gets all of its control information via a three-wire serial bus from the baseband IC. Serial data transfers always consist of 24 bits: 3 bits of address to select one of five control registers, and up to 21 bits of data. The data is shifted first into a shift register and then parallel-loaded into the proper control register after the completion of the transfer when the latch enable signal goes high. The last bit is that which immediately precedes a low-to-high latch input transition occurring while the CLOCK input is low. Bit 24 is loaded first, and bit 1 is loaded last. The four control registers are defined as follows:
n
TR: Transmit/receive register for W3020. Contains bits for setting various transmit and receive modes, setting receive gain, etc. It is expected that this register would be written several times during a frame. CONFIG: Contains bits to control various options for dc offset correction, filter-tuning, lock detect, and overload outputs, etc. It is expected that this register would be written once at initialization and then rarely updated. Since it is not affected by the power-on reset circuit, a write to this register should be the first operation performed when accessing the W3020 chip. Also, it is advisable never to update the configuration register while a critical operation is in progress. MAIN: Main counter and prescaler values for W3000 chip. Used to set mode and band bit functions for the W3020 while programming the W3000. REF: Reference counter values for W3000. Not relevant to W3020.
n
n
n
Table 12. Register Addressing A2 1 1 1 1 0 0 A1 0 0 1 1 X X A0 0 1 0 1 0 1 Register TR CONFIG RESERVED RESERVED M MAIN M REF Device W3020 W3020 W3020 W3020 W3000 W3000
Note: X indicates that the bit does not affect addressing for the given combination of A2 and A0 that addresses the W3000. In the W3000, the A1 bit is used for data content.
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Programming Information (continued)
TR Register
The TR register is the transmit/receive register for W3020. It contains bits for setting various transmit and receive modes, setting receive gain, etc. It is expected that this register would be written several times during a frame. Last bit in serial sequence
Bit No. Bit 1 2 3 4 5 6 7 8 9 10 T0 11 T1 12 T2 13 14 15 16
First bit in serial sequence
17 T4 18 T5 19 20 21 22 23 B 24 A2=1
A0=0 A1=0 G0
G1 G2
G3 G4
G5 G6
DS DP FTR T3
T6 MO1 MO2 MO3
Table 13. TR Register Bit Number 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 Bit A2 B MO3 MO2 MO1 T6 T5 T4 T3 FTR DP DS T2 T1 T0 G6 G5 G4 G3 G2 G1 G0 A1 A0 1 0 0 Digital Gain Control LNA On/Off (See Table 26.) Address Bits 0 0 0 0 1 0 0 0 0 0 -- Disable LO2 Circuitry in All Modes (See Table 16.) Disable LO1 Circuitry (W3000 excluded) (See Table 17.) RX IF Duty Cycle Corrector Disable (See Table 18.) GSM1800 TX IF LO Divide-by-3 Duty Cycle Corrector Disable (See Table 19.) LPF Tune Filter Request (See Table 20.) dc Precharge Only (See Table 21.) dc Correction Skip (See Table 22.) LO2 Divide by 2 or Divide-by-3 Select for TX IF (See Table 23.) TX IF LO Divide-by-6 Select (See Table 24.) TX IF Duty-Cycle Corrector Disable (See Table 25.) Digital Gain Control RX IF/IQ-Baseband (See Table 26.) SC1 Standard Setting 1 0 -- Address Bit Band Select (See Table 14.) RX, TX, Synthesizer Mode (See Table 15.) Function
Note: The TR register is reset to an all-zero state after the reset bit in the CONFIG register has been set high.
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range. The transmit PLL settling mode is used prior to a transmit burst in order to power up and lock the LO1 and LO2 VCO/PLL synthesizers and the respective RF and IF LO buffers connecting to the modulator circuit. The LO2 divide-by circuits remain off during this mode. Similarly, the receive PLL settling mode is used prior to the receive dc calibration time slot and subsequent receive burst in order to power up and lock the LO1 and LO2 VCO/PLL synthesizers and the respective RF and IF LO buffers connecting to the RF mixer and IF strip. The RF mixer can be turned on in this mode by setting the C9 (RF mixer on during settling) bit high in the CONFIG register (see Table 30). The transmitter ON mode turns on all the same circuits as the transmit PLL settling mode along with the I/Q modulator and up-conversion mixer. The receiver ON mode turns on all the same circuits as the receive PLL settling mode along, with the LNA (if enabled by the G0 bit--see Table 26), RF mixer, and IF amplifiers and demodulator. When first going into receive mode, a baseband LP filter tune is performed, if requested, by setting the FTR (filter tune request) bit high in the TR register and the C6 (filter tune disable) bit low in the CONFIG register (see Table 20 and Table 35, respectively, and the LowPass Filter Tuning section). Next, a dc offset calibration cycle is performed if the DS (dc correction skip) bit is low in the TR register and the C5 (dc correction disable) bit is low in the CONFIG register (see Table 22 and Table 36, respectively). The default condition is that the LNA turns off during the dc calibration if the C2 (LNA mode during dc calibration) bit is low in the CONFIG register (see Table 37). The other default condition is that the RF mixer LO1 buffer turns off during the dc calibration if the C3 (RX LO1 buffer mode during dc calibration) bit is low in the CONFIG register (see Table 38). During this event, the transmit LO1 buffer will turn on to act as a load stage for the UHF LO1 buffer. (For additional information on the dc offset calibration, see the dc Offset Correction Timing section.) After the dc calibration cycle, all the receive circuits turn on as mentioned above for the receive burst.
Programming Information (continued)
TR Register (continued)
B: Band Select When set low, the GSM900 transceiver circuits are enabled and the GSM1800 transceiver circuits are disabled. When set high, the GSM1800 transceiver circuits are enabled and the GSM900 transceiver circuits are disabled. The transceiver circuits that change with the setting of the band bit B are the LNA, the RF mixer, the receive UHF LO1 buffer, the transmit UHF LO1 buffer, and the LO2 divider for the modulator IF LO phase shifter circuit. The normal LO2 division factor for GSM900 is divide-by-2; for GSM1800, the normal LO2 division factor is divide-by3. Note that bits T2 and T1 also affect the transmitter LO2 division factor when set high (see Table 23 and Table 24). Table 14. B: Band Select B Bit 23 0 1 Function GSM900 Path On GSM1800/1900 Path On
Note: When programmed via the same three-wire bus as the W3000, updating this bit in W3020 also updates it in W3000, and vice versa.
MO[3:1]: Mode Control The various system modes of the W3020 are set by the mode control bits. These are active in both the TR and MAIN registers. The W3000 will also power up with the W3020 in any of the valid modes set by the mode bits in the TR or MAIN registers. The mode bit settings for each W3020 system mode are given in Table 15. The corresponding typical supply current for the IC in each mode is shown in the Supply Currents table on page 9. In sleep mode, both the W3020 and W3000 are powered down, and the supply current is in the A
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Programming Information (continued)
TR Register (continued)
Table 15. MO[3:1]: Mode Control MO3 Bit 22 0 0 0 0 1 1 1 1 MO2 Bit 21 0 0 1 1 0 0 1 1 MO1 Bit 20 0 1 0 1 0 1 0 1 Sleep: All Modules Powerdown Reserved Reserved Reserved TX PLL Settling Mode (LO1, LO2, TX LO1, and TX LO2 buffers on) RX PLL Settling Mode (LO1, LO2, RX LO1, and RX LO2 buffers on) TX ON (TX modulator and mixer, LO1, LO2, TX LO1, and TX LO2 buffers on) RX ON (RX mixer; LNA, if enabled; IF amplifier; LO1; LO2; RX LO1; and RX LO2 buffers on)* Function
*If MO bits are set to 111 with the dc correction skip bit low, a dc offset calibration cycle is performed automatically.
Table 16. T6: LO2 Disable If this bit is set high, the 540 MHz LO2 input buffer and LO2 PLL will be turned off. This bit will also disable the 13 MHz clock buffer going to the baseband amplifier correction circuits. This bit is provided for testing purposes. T6 Bit 19 0 1 Function LO2 Circuit Enabled LO2 Circuit Disabled
Table 18. T4: Receive IF Duty Cycle Corrector Disable When high, disables duty cycle correction circuit in the LO2 divide-by-2 circuit for the receive IF demodulator. This is provided for testing purposes. T4 Bit 17 0 1 Function Divide-by-2 Duty Cycle Corrector Enabled Divide-by-2 Duty Cycle Corrector Disabled
Table 17. T5: LO1 Disable The T5 bit disables the LO1 circuitry including the UHF LO1 buffer and bias circuit. This bit is provided for testing purposes. T5 Bit 18 0 1 Function LO1 Circuitry Enabled LO1 Circuitry Disabled
Table 19. T3: Divide-by-3 Duty Cycle Corrector Disable When high, disables duty cycle correction circuit in the GSM1800/1900 transmit IF LO divide-by-3 circuit. This is provided for testing purposes. T3 Bit 16 0 1 Function Divide-by-3 Duty Cycle Corrector Enabled Divide-by-3 Duty Cycle Corrector Disabled
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Table 23. T2: TX IF LO Division Select Switch Reverses the LO2 frequency division factor in the transmitter for both bands. This is provided for testing purposes. This bit works with the band bit B as follows. T2 Bit 12 0 0 1 1 B Bit 23 0 1 0 1 Function Divide by 2 (270 MHz): Normal GSM900 Division Divide by 3 (180 MHz): Normal GSM1800/1900 Division Divide by 3 (180 MHz): Reversed Band 0 Division Divide by 2 (270 MHz): Reversed Band 1 Division
Programming Information (continued)
TR Register (continued)
Table 20. FTR: LPF Tune Filter Request This requests tuning operation of baseband low-pass filter (see the Low-Pass Filter Tuning section for details). If the filter tune is enabled in CONFIG register, the FTR bit must be programmed high before the first following receive mode is active. Filter tune can only be done in a mode where LO2 is active, e.g., receive mode. FTR Bit 15 0 1 Function Use Default Tuning Value Perform New Tuning
Table 24. T1: TX IF LO Divide-by-6 Select This bit will change the divide-by-3 circuit to a divideby-6 circuit. This bit is provided for testing purposes. T1 Bit 11 0 1 Function Divide by 3 when 1/3 Path Is Active Divide by 6 when 1/3 Path Is Active
Table 21. DP: dc Precharge Only When dc offset calibration is performed, only the precharge portion is done. This reduces the amount of time required for dc offset calibration, but gives higher levels of dc offset. (See the dc Offset Calibration section for details.) DP Bit 14 0 1 Function
Table 25. T0: TX IF Duty Cycle Corrector Disable Standard dc Offset Correction Cycle dc Precharge Cycle Only When high, disables duty cycle correction circuit into the transmit IF phase splitter. This bit is provided for testing purposes. T0 Bit 10 0 Insert dc Correction Cycle (See Table 41.) Skip dc Offset Calibration (with retained dc correction setting) 1 Function TX IF LO Duty Cycle Corrector Enabled TX IF LO Duty Cycle Corrector Disabled
Table 22. DS: dc Correction Skip DS Bit 13 0 1 Function
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Programming Information (continued)
TR Register (continued)
Table 26. G[0:6]: Digital Gain Control Digital RX gain control with bits defined as follows: G0: When high, enables GSM900 or GSM1800/1900 LNA according to which band is selected by band bit B. (See Table 14.) G4: IF gain: 0 = 0 dB, 1 = 32 dB. G1: 0 = add 0 dB to baseband gain, 1 = add 4 dB to baseband gain in second amplifier. G2: 0 = add 0 dB to baseband gain, 1 = add 8 dB to baseband gain in first amplifier. G3: 0 = add 0 dB to baseband gain, 1 = add 16 dB to baseband gain in first amplifier. G5: 0 = add 0 dB to baseband gain, 1 = add 21 dB to baseband gain in second amplifier. G6: 0 = add 0 dB to baseband gain, 1 = add 4 dB to baseband gain in first amplifier. The nominal demodulator mixer conversion gain is 4 dB; hence, total gain is always 4 dB higher than the DGC setting. Voltage gain is differential assuming input matching network to 50 source impedance. (See Table 6.) G6 Bit 9 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 0 1 1 G5 Bit 8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 G4 Bit 7 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 1 1 G3 Bit 6 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 1 0 1 1 G2 Bit 5 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 1 0 1 1 G1 Bit 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 DGC Gain (dB) 0 4 8 12 16 20 24 28 32 36 40 44 48 52 56 60 64 21 81 85 Total Gain (dB) 4 8 12 16 20 24 28 32 36 40 44 48 52 56 60 64 68 25* 85* 89*
* Not tested or recommended for use.
G4
LPF1
G3
G2
G6*
LPF2
G5*
G1
32/0 *Not tested.
6
16/0
8/0
4/0
21/0
4/0
Figure 9. IF and I/Q Gain Distribution (dB)
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W3020 GSM Multiband RF Transceiver
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Programming Information (continued)
CONFIG Register
The CONFIG register contains bits to control various options for dc offset correction, filter-tuning, lock detect, and overload outputs, etc. It is expected that this register would be written once at initialization and then rarely updated. Since it is not affected by the power-on reset circuit, a write to this register should be the first operation performed when accessing the W3020 chip. Also, it is advisable never to update the configuration register while a critical operation is in progress. Last bit in serial sequence
Bit No. Bit 1 2 3 RS 4 5 6 7 8 C2 9 C3 10 C4 11 C5 12 C6 13 14 15 16
First bit in serial sequence
17 18 19 20 21 F2 22 F3 23 24
A0=1 A1=0
DT0 DT1 DT2 C1
C7 LD2 C8 VO C9 OLD C10 F1
F4 A2=1
Table 27. CONFIG Register Bit No. 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 Bit A2 F4 F3 F2 F1 C10 OLD C9 VO C8 LD2 C7 C6 C5 C4 C3 C2 C1 DT[2] DT[1] DT[0] RS A1 A0 SC1 Standard Setting 1 0 0 0 0 1 0 0 1 0 1 0 0 0 1 0 0 1 0 1 1 1* 0 1 Function Address Bit 2 Reserved
Enable of LO2 PLL (See Table 28.) Disable of Overload Pin Output Signal, When High (See Table 29.) Force RF Mixer On When RX LO1 Buffer Is On, When High (See Table 30.) Reserved; Always High (See Table 31.) LO2 Charge Pump Output Off (high impedance), When High (See Table 32.) Enable LO2 Lock Detect Output, When High (See Table 33.) Select dc Offset Correction/Fine Tune, When High (See Table 34.) Disable LP Filter Bandwidth Tune and Use Default Value, When High (See Table 35.) Disable dc Offset Correction and Use Default Setting, When High (See Table 36.) High Bandwidth Setting of Baseband Path, When High (See Table 37.) RX LO1 Buffer On During dc Calibration When High (See Table 38.) LNA On During dc Calibration, When High (See Table 39.) LO2 Phase Detector Polarity, Positive Slope, When High (See Table 40.) dc Offset Correction Time (See Table 41.)
Resets Bit Content in Other Registers, When High (See Table 42.) Address Bit 1 Address Bit 0
* It is recommended that a reset be programmed after power-on. Reset does not affect the content of the CONFIG register.
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Programming Information (continued)
CONFIG Register (continued)
Table 28. C10: LO2 PLL Enable When low, disables counters, phase detector, and charge pump of the LO2 PLL. This mode is provided for applications utilizing an external programmable IF PLL. C10 Bit 19 0 1 LO2 PLL Disabled LO2 PLL Operational (normal) Function
Table 29. OLD: Overload Output Disable When high, forces overload output pin to be a logic low level. Otherwise, overload pin indicates overload. OLD Bit 18 0 1 Function Overload Detect Output for IF/Baseband Enabled Overload Detect Output for IF/Baseband Disabled
Table 30. C9: RF Mixer On During Settling When high, enables receive RF mixer during receive PLL settling mode. In default operation, this bit should be set to 0. If there were a problem with the VCO kicking when going from settling mode to full receive mode, it could be set high. C9 Bit 17 0 1 Function Default: RX Mixer Off During RX Settling Mode (MO[3:1] = 101) RX Mixer On During RX Settling Mode (MO[3:1] = 101)
Table 31. VO: LO1 Buffer Mode VO Bit 16 0 1 Not Allowed LO1 Buffer Mode Function
Table 32. C8: LO2 Charge Pump Off C8 Bit 15 0 1 Function Normal LO2 Charge Pump Operation Charge Pump Off (high impedance) or CP2 Test Mode
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Programming Information (continued)
CONFIG Register (continued)
Table 33. LD2: Lock Detect Enable LD2 Bit 14 0 1 Function Lock Detect Output for LO2 Disabled Lock Detect Output for LO2 Enabled
Note: When disabled, the lock detect output is a logic level high. When lock detect is enabled but 540 MHz PLL is not locked, LD output is pulsing low. When lock detect is enabled and 540 MHz PLL is locked, LD output is high.
Table 34. C7: dc Coarse/Fine Correction When this bit is low, coarse offset calibration is done such that the SC1's offset calibration can be done simultaneously. When this bit is high, a fine calibration is done, but this is not compatible with the SC1. C7 Bit 13 0 1 Function Coarse dc Correction Tuning (for interface with baseband with calibration function) with Output Buffer dc Connection Retained Fine Tune (no baseband calibration required), No Output Available During Calibration
Table 35. C6: Filter Tune Disable Disable LP filter bandwidth tune and use default value. C6 Bit 12 0 1 Bandwidth Setting Use Calibration Use Default Function Requires LPF Tune Request Cycle to Be Executed Always Use Default Noncorrected Value (less accurate)
Table 36. C5: dc Correction Disable C5 Bit 11 0 1 Function Correction Cycle Before Each RX Always Use Default Noncorrected Value
Table 37. C4: Low-Pass Filter Bandwidth C4 Bit 10 0 1 Low Bandwidth (115 kHz)* High Bandwidth (168 kHz) for Use with SC1, etc. Function
* Not tested or recommended for use.
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W3020 GSM Multiband RF Transceiver
Programming Information (continued)
CONFIG Register (continued)
Table 38. C3: Receive LO1 Buffer Mode During dc Calibration C3 Bit 9 0 1 Function RX LO1 Buffer Off During dc Offset Calibration RX LO1 Buffer On During dc Offset Calibration
Table 39. C2: LNA Mode During dc Calibration C2 Bit 8 0 1 Function LNA Off During dc Offset Calibration* LNA On During dc Offset Calibration
*Recommended to meet GSM sensitivity requirement.
Table 40. C1: 540 MHz LO2 Phase Detector Polarity C1 Bit 7 0 1 Function (See Figure 10.) Negative Charge Pump Polarity (VCO2 Frequency Decrease with CP2 Voltage) Positive Charge Pump Polarity (VCO2 Frequency Increase with CP2 Voltage)
LOOP FILTER W3020 PLL REFERENCE VCO OUTPUT FREQUENCY
C1 STATE = 1
C1 STATE = 0
540 MHz VCO
VCO INPUT CONTROL VOLTAGE
Figure 10. Programming the LO2 Phase Detector Slope
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Programming Information (continued)
CONFIG Register (continued)
Table 41. DT[2:0]: dc Correction Time Total dc offset calibration time is determined according to the table below. For further information, see the discussion in the dc Offset Calibration section. DT[2] Bit 6 0 0 0 0 1 1 1 1 X
* See Table 21.
DT[1] Bit 5 0 0 1 1 0 0 1 1 X
DT[0] Bit 4 0 1 0 1 0 1 0 1 X
T (RX_Valid) (s) 72 131 190 249 309 368 427 486 42 (DP = 1)*
Table 42. RS: Reset Bit Content When set high, all registers except for the CONFIG register are reset to 0. When set low, no action occurs. RS Bit 3 0 1 Function No Function Reset Other Registers One Time
MAIN Register
Last bit in serial sequence
Bit Bit No. 1
A0=0
First bit in serial sequence
10
x
2
x
3
x
4
x
5
x
6
x
7
x
8
x
9
x
11
x
12
x
13
x
14
x
15
x
16
x
17
x
18
x
19
x
20
MO1
21
MO2
22
MO3
23
B
24
A2=0
Note: Bits designated x do not apply to W3020.
Programming the MAIN register affects the states of both the W3000 and the W3020. The MO bits (see Table 15) and band bit B (see Table 14) have the same functions as described in the TR Register section. The W3020 state is determined by the most recent programming event to either the MAIN register or the TR register.
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Programming Information (continued)
Filter Tune and dc Offset Correction Timing
Low-Pass Filter Tuning The W3020 has an internal calibration to improve the accuracy of the low-pass filter bandwidth. The filter tune operation should be performed each time supply voltage is applied to the device and after restart. The low-pass filter tuning operation is controlled by 3 bits in the control logic:
n n n
FTR: filter tune request, in the TR register C4: low-pass filter bandwidth, in the CONFIG register C6: filter tune disable, in the CONFIG register
If the filter tune disable bit (C6) is programmed high, the filter bandwidth is set to the programmed (nominal) value (see Table 35), and any request for filter tuning from the FTR bit is ignored. The accuracy of the filter bandwidth can be improved by performing a filter tune calibration. A filter tune can be performed by setting the filter tune request (FTR) bit in the TR register high and the filter tune disable bit (C6) in the CONFIG register low. This enables a 13/4 MHz (3.25 MHz) clock to the filter tuning state machine, which then runs until the tuning is complete and the new filter tune values are stored. The filter tune operation itself takes 16.5 cycles of the 3.25 MHz clock, or 5.1 s. The filter tune operation should be done in receive mode. The receive mode needs to be held active for at least 20 s to allow for bias start-up. The dc offset calibration, if requested, is performed after the filter tune is complete. The filter tune operation adds 5.1 s to the total calibration time when requested at the same time as a dc offset calibration. If a filter tune is requested while the MOD bits are not set to 111, only the receive bias circuitry is turned on; the rest of the receive channel remains powered down.
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Programming Information (continued)
Filter Tune and dc Offset Correction Timing (continued)
dc Offset Calibration The dc offset calibration operation is controlled by several bits in the CONFIG and TR registers:
n n n n n
DS: dc correction skip, in the TR register DP: dc precharge only, in the TR register C5: dc correction disable, in the CONFIG register C7: dc coarse/fine correction, in the CONFIG register DT: dc correction time, in the CONFIG register
When the dc correction disable bit (C5) in the CONFIG register is written high, the dc offset correction circuitry charges to a default value, corresponding to 0 dc offset, and any request for dc offset calibration is ignored. If dc correction disable = 0, the dc offset calibration is initiated by writing the MO bits in the TR (or MAIN) register to a value of 111 while dc correction skip (DS) and dc precharge only (DP) are both low. As in the case of the filter tune, start of dc offset calibration is held off for about 15 s while the bias circuits and input clock buffer start-up. If the FTR bit was also written high coincident with entering RX mode, a filter tune is performed first, after which dc offset calibration begins automatically. The dc offset calibration runs for a time determined by the dc offset correction time bits DT[0:2] in the CONFIG register. There are three of these bits, giving the user a choice of eight different correction times. Upon completion of the dc offset calibration, the 3.25 MHz baseband clock stops and full receive mode is entered automatically, with the LO1 buffer and LNA (if G0 = 1) being enabled automatically. If RX mode is entered with dc precharge only (DP = 1) set high, dc offset circuitry runs through a much shorter calibration routine, after which normal receive mode is entered automatically. The precharge-only operation functions much the same as the normal calibration operation in that the LO1 buffer and LNA is disabled until completion of the precharge operation. The 15 s bias start-up time is still incurred. The receive circuitry conditions during dc calibration are also controlled by two other bits in the CONFIG register:
n n
C2: LNA on during dc calibration, when high C3: receive LO1 buffer on during dc, calibration when high
For both the standard dc offset calibration cycle and the dc precharge-only operation, it is possible to perform dc offset calibration with the LNA and/or LO1 buffer on by setting the C2 and C3 bits in the CONFIG register.
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W3020 GSM Multiband RF Transceiver
Programming Example
This programming example shows how the W3020 can be programmed after power-on and how it can be programmed prior to receive and transmit bursts. The reference register for the W3000 is initialized separately with the reference divider ratio, as described in the W3000 data sheet. Table 43. Initialize CONFIG Register (Reset W3020) To reset all registers to their default state and put the device into a low-power sleep mode, one write to the CONFIG register is necessary. This will also reset W3000 if it is connected on the same three-wire bus. Normally, the device will be both reset and configured in the same programming as follows: CONFIG register: reset device, set dc calibration time to max value (486 s), set phase detector polarity for the positive slope VCO, use high BW and coarse dc offset tune.
Bit Bit No. Setting 1 A0 1 2 A1 0 3 1 4 1 5 1 6 1 7 1 8 C2 0 9 C3 0 10 C4 1 11 C5 0 12 C6 0 13 0 14 0 15 0 16 VO 1 17 0 18 0 19 1 20 0 21 F2 0 22 F3 0 23 F4 0 24 A2 1 RS DT0 DT1 DT2 C1 C7 LD2 C8 C9 OLD C10 F1
Note: Hex value = 84827d.
Table 44. Initialize TR Register The reset operation will set the TR register to the following content:
Bit Setting 1 0 2 0 3 0 4 G1 0 5 G2 0 6 G3 0 7 G4 0 8 G5 0 9 G6 0 10 T0 0 11 T1 0 12 T2 0 13 DS 0 14 DP 0 15 FTR 0 16 T3 0 17 T4 0 18 T5 0 19 T6 0 20 0 21 0 22 0 23 B 0 24 A2 1 Bit No. A0 A1=0 G0 MO1 MO2 MO3
Note: Hex value = 800000.
A filter tune request with this TR content, setting FTR = 1 and MO[1:3] = 111, could be done as a second initialize followed by a third programming that powers the IC in idle mode. Table 45. Settle PLL to GSM1800 Band for Receive Mode (W3020/W3000) Main register: switch to W3020 receive settling mode to allow LO2 to settle; band bit B = 1 for GSM1800. (W3000 is programmed at the same time to settle LO1 to 1572 MHz frequency with N = 7860 to receive at 1842 MHz.)
Bit Setting 1 0 2 0 3 A2 0 4 A3 1 5 A4 0 6 A5 1 7 A6 1 8 A7 0 9 M1 0 10 M2 1 11 M3 0 12 M4 1 13 M5 1 14 M6 1 15 M7 1 16 M8 0 17 M9 0 18 0 19 0 20 1 21 0 22 1 23 B 1 24 A1=0 0 Bit No. A0=0 A1 M10 M11 MO1 MO2 MO3/EN
Notes: Hex value = 687A68. Italics indicate W3000 bits.
Lucent Technologies Inc.
33
W3020 GSM Multiband RF Transceiver
Advance Data Sheet December 1999
Programming Example (continued)
Table 46. Perform Receive (W3020) TR register: full receive mode; set DGC gain to 60 dB gain setting with LNA on (G0 = 1) and with normal dc offset calibration; band bit B = 1.
Bit 1 2 0 3 G0 1 4 G1 1 5 G2 1 6 G3 1 7 G4 1 8 G5 0 9 G6 0 10 T0 0 11 T1 0 12 T2 0 13 DS 0 14 0 15 1 16 0 17 T4 0 18 T5 0 19 T6 0 20 MO1 1 21 MO2 1 22 MO3 1 23 B 1 24 A2 1 Bit No. A0 A1 Setting 0 DP FTR T3
Note: Hex value = f8407C.
To change gain settings and remain in receive mode without redoing dc offset calibration, repeat the bus transaction above with dc skip bit high (DS = 1). It should be noted that as dc offset is gain-dependent, dc skip mode can be used only for receive signal levels where dc offset is insignificant. Table 47. Settle PLL in GSM1800 Band for Transmit Mode (W3020/W3000) MAIN register: switch W3020 to transmit settling mode to allow LO2 to settle; band bit B = 1. (W3000 is programmed at the same time to settle LO1 to 1567 MHz frequency with N = 7835 to transmit at 1747 MHz.)
Bit Bit No. Setting Notes: Hex value = 607A36. Italics indicate W3000 bits. 1 0 2 1 3 1 4 A3 0 5 A4 1 6 A5 1 7 A6 0 8 A7 0 9 M1 0 10 M2 1 11 M3 0 12 M4 1 13 M5 1 14 M6 1 15 M7 1 16 M8 0 17 0 18 0 19 0 20 0 21 0 22 1 23 B 1 24 A1 0 A0 A1 A2 M9 M10 M11 MO1 MO2 MO3/EN
Table 48. Basic GSM1800 Transmit Burst (W3020) TR register: full transmit mode; band bit B = 1.
Bit Setting 1 0 2 0 3 0 4 G1 0 5 G2 0 6 G3 0 7 G4 0 8 G5 0 9 G6 0 10 T0 0 11 T1 0 12 T2 0 13 DS 0 14 DP 0 15 FTR 0 16 T3 0 17 T4 0 18 T5 0 19 T6 0 20 MO1 0 21 MO2 1 22 MO3 1 23 B 1 24 A2 1 Bit No. A0 A1=0 G0
Note: Hex value = f00000.
To change to the GSM900 MHz band for the example above, band bit B must be changed to B = 0 and the appropriate channel programming must be set up for the W3000 synthesizer.
34
Lucent Technologies Inc.
Advance Data Sheet December 1999
W3020 GSM Multiband RF Transceiver
Application Information
S-Parameters
VCC = 3.0 Vdc; TA = 25 C 3 C.
1.0
0.5 2.7 dB 2.2 dB 0.2 1.95 dB
2.0
5.0
NF = 1.7 dB 0.0 0.0 0.2 0.5 1.0 2.0 5.0 inf
-0.2
-5.0
-0.5
-2.0
-1.0
Figure 11. GSM900 Smith Chart Noise Circles
Lucent Technologies Inc.
35
W3020 GSM Multiband RF Transceiver
Advance Data Sheet December 1999
Application Information (continued)
S-Parameters (continued)
VCC = 3.0 Vdc; TA = 25 C 3 C.
1.0
0.5 3.2 2.7 2.45 0.2 NF = 2.2 dB
2.0
5.0
0.0 0.0
0.2
0.5
1.0
2.0
5.0
inf
-0.2
-5.0
-0.5
-2.0
-1.0
Figure 12. GSM1800 Smith Chart Noise Circles
36
Lucent Technologies Inc.
Advance Data Sheet December 1999
W3020 GSM Multiband RF Transceiver
Application Information (continued)
S-Parameters (continued)
Table 49. GSM900 LNA S-Parameters VCC = 3.0 Vdc; TA = 25 C 3 C. Frequency (MHz) 100 200 300 400 500 600 700 800 900 1000 1100 1200 1300 1400 1500 1600 1700 1800 1900 2000 2100 2200 2300 2400 2500 S11 M S11 A () S21 M S21 A () 167.024 155.803 145.198 135.689 127.596 119.590 112.981 106.650 100.661 94.9959 90.8171 85.6440 81.5583 76.8340 72.0844 68.7585 64.9867 61.2486 59.2405 50.8883 47.7366 45.7805 40.2674 42.2038 42.1508 S12 M 0.00063 0.00148 0.00181 0.00251 0.00276 0.00299 0.00260 0.00290 0.00302 0.00318 0.00267 0.00324 0.00288 0.00341 0.00397 0.00471 0.00534 0.00616 S12 A () 108.261 98.4551 86.3048 83.6600 84.1787 83.1737 80.3089 92.0429 105.246 108.434 105.419 107.600 125.081 135.968 161.841 168.714 167.996 179.682 S22 M S22 A ()
0.73697 -18.1202 10.1130 0.71547 -35.3615 9.63213 0.68868 -52.1150 9.01626 0.65380 -66.8624 8.26280 0.62345 -80.3837 7.61255 0.59518 -92.3966 6.98581 0.57246 -103.370 6.42038 0.55250 -113.144 5.84999 0.53472 -121.776 5.41191 0.52449 -129.730 4.96497 0.51695 -136.927 4.54764 0.51169 -143.454 4.20028 0.51068 -149.415 3.87755 0.51096 -154.979 3.68374 0.51414 -159.764 3.34692 0.52308 -164.732 3.08327 0.53386 -169.326 2.88980 0.54681 -173.677 2.67055 0.56327 -177.995 2.52768 0.58655 0.61055 0.63890 0.67279 0.70166 0.69801 177.870 173.358 169.100 164.540 157.738 152.694 2.36696 2.01609 1.90730 1.67030 1.43980 1.43414
0.88093 -3.17707 0.87849 -6.79066 0.87674 -10.1757 0.87160 -13.5508 0.86700 -17.0460 0.86409 -20.5497 0.85979 -24.1577 0.85520 -27.6815 0.84782 -31.3605 0.84282 -35.1238 0.84045 -38.9134 0.83653 -42.4718 0.83142 -46.2154 0.82654 -50.0614 0.82332 -53.6481 0.81938 -57.3655 0.81513 -60.9721 0.81137 -64.5700
0.00689 -176.113 0.80540 -68.4487 0.00956 -172.396 0.79940 -72.1942 0.01148 -162.142 0.78856 -75.9597 0.01420 -163.127 0.77498 -79.9530 0.01902 -164.360 0.75985 -83.7696 0.02325 -172.911 0.72803 -87.5333 0.02096 176.062 0.71022 -89.7521
Lucent Technologies Inc.
37
W3020 GSM Multiband RF Transceiver
Advance Data Sheet December 1999
Application Information (continued)
S-Parameters (continued)
Table 50. GSM1800/GSM1900 LNA S-Parameters VCC = 3.0 Vdc; TA = 25 C 3 C. Frequency (MHz) 100 200 300 400 500 600 700 800 900 1000 1100 1200 1300 1400 1500 1600 1700 1800 1900 2000 2100 2200 2300 2400 2500 S11 M 0.72049 0.71626 0.71044 0.70201 0.69282 0.68120 0.67035 0.65592 0.64597 0.63456 0.62423 0.61403 0.60385 0.59482 0.58684 0.57814 0.57105 0.56477 0.55982 0.55777 0.55688 0.56016 0.56820 0.57964 0.58945 S11 A () -10.3679 -19.1839 -28.3682 -37.4979 -46.3680 -54.9675 -63.3538 -71.2914 -79.0065 -86.4313 -93.6246 -100.327 -106.845 -112.987 -118.926 -124.639 -129.931 -134.970 -139.548 -143.939 -148.071 -151.973 -155.843 -160.100 -165.135 S21 M 9.36459 9.21437 9.03450 8.83372 8.55083 8.30631 8.05458 7.58639 7.46492 7.13151 6.81838 6.67615 6.29544 6.01260 5.65650 5.21175 5.07085 4.89004 4.80069 4.51916 4.25839 3.94905 3.59528 3.28148 2.93579 S21 A () 174.651 169.174 164.561 159.108 154.851 150.462 146.384 142.145 138.393 133.917 130.585 127.321 123.748 119.859 118.200 112.564 111.847 110.382 104.700 102.377 99.0766 92.5373 93.4844 87.5410 86.2816 S12 M 0.00071 0.00049 0.00098 0.00114 0.00135 0.00150 0.00165 0.00175 0.00183 0.00195 0.00201 0.00208 0.00204 0.00205 0.00208 0.00204 0.00207 0.00220 0.00240 0.00341 0.00465 0.00625 0.00829 0.01021 0.01275 S12 A () 89.4532 99.1328 87.1197 87.1865 94.1083 96.8748 100.411 104.474 111.176 117.300 122.491 126.815 133.665 142.947 152.563 162.947 174.520 -169.811 -146.913 -132.600 -124.298 -118.045 -118.835 -119.685 -125.117 S22 M 0.88784 0.88789 0.88873 0.88615 0.88441 0.88354 0.88348 0.88423 0.88429 0.88418 0.88425 0.88393 0.88415 0.88476 0.88424 0.88146 0.87975 0.87879 0.87737 0.87559 0.87125 0.86413 0.85277 0.83323 0.80091 S22 A () -3.00579 -5.98988 -9.06578 -12.3322 -15.3451 -18.3246 -21.4507 -24.6622 -27.7779 -30.8038 -34.0814 -37.2883 -40.5591 -43.8425 -47.3427 -50.8879 -54.4046 -58.0057 -61.7517 -65.6357 -69.5440 -73.7550 -78.2931 -82.8408 -87.1585
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Lucent Technologies Inc.
Advance Data Sheet December 1999
W3020 GSM Multiband RF Transceiver
Application Information (continued)
S-Parameters (continued)
Table 51. Receive IF Amplifier Input (0 dB Setting) Port 1 = IFIN (pin 34). Port 2 = IFIP (pin 35). Frequency (MHz) S11 M S11 A () S21 M S21 A () S12 M S12 A () S22 M S22 A () 265.00 268.00 269.00 269.80 269.85 269.90 269.95 270.00 270.05 270.10 270.15 270.20 271.00 272.00 275.00 0.9531 0.9560 0.9526 0.9555 0.9545 0.9572 0.9546 0.9541 0.9540 0.9540 0.9563 0.9532 0.9522 0.9539 0.9553 -149.48 -151.10 -151.61 -152.17 -152.42 -152.36 -152.15 -152.20 -152.47 -152.47 -152.47 -152.44 -152.82 -153.41 -155.31 0.0582 0.0590 0.0591 0.0595 0.0594 0.0595 0.0594 0.0599 0.0595 0.0597 0.0599 0.0595 0.0599 0.0602 0.0606 -74.34 -75.38 -76.10 -77.08 -76.46 -76.78 -76.57 -76.78 -76.99 -76.92 -76.98 -76.88 -77.26 -77.81 -80.02 0.0574 0.0583 0.0584 0.0585 0.0592 0.0584 0.0585 0.0588 0.0587 0.0592 0.0585 0.0585 0.0590 0.0596 0.0600 -73.08 -74.27 -75.11 -75.44 -75.33 -75.82 -76.25 -75.51 -76.01 -75.82 -75.25 -75.54 -76.27 -76.62 -79.05 0.9490 0.9510 0.9527 0.9502 0.9511 0.9501 0.9498 0.9513 0.9530 0.9484 0.9465 0.9501 0.9510 0.9510 0.9483 -156.92 -158.53 -159.09 -159.68 -159.70 -159.87 -159.73 -159.83 -159.74 -159.96 -159.92 -159.87 -160.59 -160.97 -162.83
Table 52. Receive IF Amplifier Input (32 dB Setting) Port 1 = IFIN (pin 34). Port 2 = IFIP (pin 35). Frequency (MHz) S11 M S11 A () S21 M S21 A () S12 M S12 A () S22 M S22 A () 265.00 268.00 269.00 269.80 269.85 269.90 269.95 270.00 270.05 270.10 270.15 270.20 271.00 272.00 275.00 0.9295 0.9285 0.9278 0.9284 0.9279 0.9302 0.9279 0.9279 0.9293 0.9267 0.9294 0.9298 0.9251 0.9278 0.9289 -152.17 -154.07 -154.73 -155.09 -155.15 -155.14 -155.15 -155.01 -155.26 -155.32 -155.39 -155.34 -155.68 -156.36 -158.13 0.1161 0.1180 0.1180 0.1190 0.1190 0.1191 0.1191 0.1190 0.1190 0.1190 0.1201 0.1191 0.1191 0.1202 0.1224 -88.39 -90.37 -90.72 -91.33 -91.27 -91.60 -91.65 -91.39 -91.53 -91.56 -91.82 -91.66 -92.14 -92.92 -94.78 0.1095 0.1112 0.1122 0.1131 0.1131 0.1131 0.1131 0.1141 0.1131 0.1131 0.1131 0.1131 0.1141 0.1150 0.1160 -84.71 -86.54 -86.90 -87.61 -87.67 -87.85 -87.73 -87.72 -87.72 -87.90 -87.93 -87.74 -88.32 -88.83 -90.99 0.9150 0.9177 0.9180 0.9159 0.9191 0.9170 0.9163 0.9172 0.9154 0.9161 0.9170 0.9167 0.9150 0.9152 0.9149 -159.66 -161.45 -161.98 -162.59 -162.59 -162.81 -162.73 -162.55 -162.71 -162.99 -162.81 -162.87 -163.43 -163.82 -165.83
Lucent Technologies Inc.
39
W3020 GSM Multiband RF Transceiver
Advance Data Sheet December 1999
Application Information (continued)
S-Parameters (continued)
Table 53. Transmit Modulator IF Output Port 1 = TIFON (pin 52). Port 2 = TIFOP (pin 53). Frequency (MHz) S11 M S11 A () S21 M S21 A () S12 M S12 A () S22 M S22 A () 100 150 160 170 175 180 185 190 200 250 260 265 270 275 280 290 300 400 500 540 600 700 800 900 1000 1100 0.3614 0.3733 0.3769 0.3744 0.377 0.3749 0.3788 0.3769 0.382 0.3975 0.4021 0.4019 0.4383 0.4032 0.4055 0.4081 0.4112 0.4493 0.4882 0.5075 0.5292 0.5667 0.5908 0.5954 0.5885 0.5781 -27.344 -40.987 -43.517 -46.346 -47.403 -45.193 -49.751 -51.342 -54.288 -68.232 -70.805 -72.266 -72.519 -74.838 -76.144 -78.499 -81.034 -105.378 -126.562 -134.57 -145.148 -161.717 -176.224 170.318 160.18 152.142 0.0243 0.0323 0.0342 0.0361 0.0358 0.0135 0.0335 0.035 0.0371 0.041 0.0441 0.0442 0.0741 0.0475 0.0509 0.0534 0.0579 0.0868 0.1277 0.1452 0.1667 0.2189 0.2803 0.3422 0.3312 0.3281 60.57 60.738 66.64 57.289 62.482 91.599 65.218 61.298 64.049 75.557 81.698 81.769 93.489 84.667 85.227 89.07 85.089 88.627 85.741 79.56 78.41 72.108 64.602 50.1 29.167 21.204 0.0268 60.283 0.3613 -27.514 0.0311 59.72 0.374 -41.233 0.0337 66.158 0.3783 -43.974 0.0356 59.268 0.3754 -47.12 0.0357 62.455 0.3792 -48.032 0.0273 8.782 0.3517 -47.861 0.0354 64.219 0.3795 -50.619 0.0362 62.918 0.3821 -52.245 0.037 65.059 0.3834 -55.193 0.0415 76.118 0.3863 -70.582 0.0452 80.66 0.3834 -73.645 0.0452 80.355 0.3796 -75.134 0.073 104.612 0.4018 -73.513 0.048 83.377 0.373 -76.937 0.0509 83.407 0.3714 -77.711 0.053 86.162 0.3704 -78.464 0.058 84.222 0.3759 -80.773 0.0852 88.783 0.414 -104.91 0.1249 85.452 0.4541 -125.138 0.1366 83.826 0.4585 -131.438 0.1663 77.442 0.5014 -142.17 0.2237 72.385 0.545 -157.555 0.2802 62.116 0.5721 -171.84 0.3124 47.809 0.5935 175.837 0.3307 33.106 0.6026 166.077 0.3481 21.367 0.6105 157.826
40
Lucent Technologies Inc.
Advance Data Sheet December 1999
W3020 GSM Multiband RF Transceiver
Application Information (continued)
S-Parameters (continued)
Table 54. Transmit IF Input to Up-Conversion Mixer Port 1 = TIFIP (pin 5). Port 2 = TIFIN (pin 6). Frequency (MHz) S11 M S11 A () S21 M S21 A () S12 M S12 A () S22 M S22 A () 100 150 160 170 175 180 185 190 200 250 260 265 270 275 280 290 300 400 500 540 600 700 800 900 1000 1100 0.5058 0.5585 0.5628 0.5695 0.5721 0.5749 0.5773 0.5806 0.5864 0.6139 0.6172 0.6193 0.6218 0.6207 0.6241 0.6278 0.6299 0.6625 0.6744 0.6733 0.6762 0.6837 0.6847 0.6863 0.6872 0.6822 -177.126 179.286 178.676 178.13 177.643 177.301 176.912 176.598 175.696 172.103 171.533 171.176 170.811 170.529 170.217 169.479 168.857 161.336 153.87 152.146 147.871 143.115 137.965 133.307 128.201 123.088 0.1947 -12.79 0.1905 -14.311 0.1493 -11.292 0.1419 -12.859 0.1435 -9.56 0.1367 -11.135 0.1396 -8.09 0.1339 -9.466 0.1388 -6.754 0.1323 -8.312 0.1388 -6.249 0.1315 -7.386 0.137 -5.325 0.1307 -6.864 0.1361 -4.71 0.1302 -6.347 0.1355 -3.398 0.1282 -5.664 0.1242 4.719 0.1116 4.718 0.1248 7.467 0.1121 8.158 0.1254 8.698 0.1129 9.86 0.1264 9.558 0.1149 11.102 0.1285 10.647 0.1164 12.686 0.1306 11.307 0.1187 13.716 0.1339 12.027 0.1229 14.746 0.1359 12.22 0.1265 15.109 0.1695 26.49 0.166 30.695 0.2253 24.951 0.218 28.653 0.2198 17.441 0.2269 20.962 0.2566 17.566 0.2493 18.903 0.2774 11.42 0.2733 11.823 0.3153 6.357 0.297 6.915 0.3279 -3.477 0.2932 2.598 0.2798 -8.735 0.2868 -4.204 0.304 -10.551 0.3094 -11.399 0.5111 0.5639 0.5696 0.5751 0.5785 0.5828 0.5844 0.5887 0.5932 0.6189 0.6255 0.6264 0.6288 0.6291 0.6322 0.6362 0.6407 0.673 0.6769 0.6518 0.6683 0.6688 0.6708 0.6741 0.6827 0.6846 -177.728 178.853 178.017 177.39 177.012 176.539 176.248 175.806 175.063 171.255 170.441 170.083 169.611 169.403 168.935 168.072 167.231 159.047 151.351 149.735 145.629 141.363 136.953 133.532 130.017 126.018
Lucent Technologies Inc.
41
W3020 GSM Multiband RF Transceiver
Advance Data Sheet December 1999
Application Information (continued)
S-Parameters (continued)
Table 55. Transmit RF Output from Up-Conversion Mixer Port 1 = TOV (pin 60). Port 2 = TOUT (pin 59).
Frequency (MHz) 500 800 850 875 887.5 900 912.5 925 937.5 950 962.5 975 1000 1700 1712.5 1725 1737.5 1750 1762.5 1775 1787.5 1800 1812.5 1825 1837.5 1850 1862.5 1875 1887.5 1900 1912.5 1925 1937.5 1950 1962.5 1975 1987.5 2000 S11 M 0.963 0.9463 0.9478 0.9471 0.9445 0.9384 0.9465 0.9575 0.9434 0.9377 0.928 0.9352 0.9349 0.7367 0.7233 0.7136 0.6994 0.6936 0.6797 0.6685 0.6494 0.6503 0.6449 0.6533 0.6292 0.6203 0.6168 0.6189 0.6011 0.6145 0.6003 0.5666 0.5857 0.5789 0.5597 0.5359 0.555 0.555 S11 A () -21.042 -37.236 -39.572 -41.282 -42.042 -42.822 -43.326 -44.836 -45.632 -46.171 -47.687 -48.135 -50.069 -118.813 -122.78 -124.997 -126.458 -128.343 -128.292 -129.811 -131.842 -131.754 -133.665 -137.305 -136.07 -136.917 -138.04 -142.061 -140.385 -139.843 -142.012 -142.51 -145.342 -146.191 -146.175 -151.61 -147.335 -150.321 S21 M S21 A () 0.0583 45.382 0.075 23.36 0.0553 36.857 0.0552 34.713 0.0546 31.41 0.0422 11.154 0.0452 20.131 0.0318 37.41 0.0398 35.47 0.0348 36.164 0.0459 30.299 0.0464 48.624 0.0408 25.125 0.4566 116.282 0.4859 115.896 0.5398 112.112 0.5611 107.372 0.5605 101.527 0.5618 95.946 0.5338 94.272 0.5326 97.176 0.5302 96.268 0.5662 96.331 0.5723 95.889 0.6464 90.019 0.6377 83.438 0.6126 78.826 0.5349 76.428 0.5379 77.397 0.5299 76.41 0.5398 81.318 0.5718 82.52 0.5901 80.549 0.6116 78.454 0.611 75.563 0.6008 74.456 0.6359 70.535 0.6123 71.054 S12 M S12 A () 0.0628 49.126 0.0831 27.071 0.0597 39.225 0.0684 37.846 0.0643 28.659 0.0955 30.339 0.0503 7.264 0.0672 34.909 0.0405 34.066 0.0354 32.187 0.0395 65.541 0.0336 37.71 0.037 23.964 0.4121 109.367 0.4365 108.44 0.4616 110.187 0.5147 105.261 0.5603 98.485 0.566 94.77 0.5441 89.296 0.5036 84.854 0.474 88.133 0.4714 91.439 0.5172 90.876 0.5245 93.345 0.5592 92.612 0.5844 89.189 0.6301 85.411 0.5842 81.177 0.5801 77.016 0.5563 79.922 0.526 77.979 0.5728 81.259 0.5932 80.357 0.6214 78.699 0.6711 75.726 0.6292 72.372 0.6364 71.938 S22 M 0.971 0.9318 0.9477 0.9468 0.947 0.9413 0.9534 0.9616 0.9476 0.9485 0.9557 0.9373 0.9416 0.7109 0.7242 0.7327 0.7049 0.7156 0.6903 0.6812 0.6886 0.6673 0.6571 0.677 0.6257 0.6252 0.6202 0.6217 0.6097 0.6516 0.6114 0.6145 0.5934 0.5818 0.5749 0.5676 0.5566 0.5537 S22 A () -22.198 -38.288 -40.772 -42.597 -43.555 -46.025 -45.052 -46.123 -46.268 -46.354 -47.636 -49.303 -51.094 -120.942 -122.438 -124.948 -126.805 -128.63 -130.228 -131.56 -134.751 -132.553 -133.945 -134.916 -135.788 -137.496 -139.816 -138.545 -142.359 -143.578 -143.639 -147 -145.589 -146.725 -148.368 -149.154 -154.653 -153.236
42
Lucent Technologies Inc.
Advance Data Sheet December 1999
W3020 GSM Multiband RF Transceiver
Outline Diagram
64-Pin TQFPT
Dimensions are in millimeters.
12.00 0 .20 10.00 0 .20 PIN #1 ID ENTIFIER ZON E
64 49
1.00 REF
0.25 GA GE PLAN E
1
48
SEATING PLANE 0.45/0.75
10.00 0. 20 12.00 0. 20
DETA IL A
16
33
0.09/0.20
17 32
0.17/0.27 DETAIL A DETA IL B 1.00 0 .05 0.08
M
1.20 MA X SEAT ING PLANE 0.08 0.50 TYP 0.05/0.15
DET AIL B
5-3080.a
Lucent Technologies Inc.
43
W3020 GSM Multiband RF Transceiver
Advance Data Sheet December 1999
Manufacturing Information
This device will be assembled in one of the following locations: assembly codes K or M.
Evaluation Board Note
The EVB3020A Evaluation Board is available for customer demonstration (see Ordering Information) of device performance characteristics. The board allows full characterization with RF laboratory bench equipment. Various applications of the device can be demonstrated on the evaluation board.
Ordering Information
Device Code LUCW3020CCS LUCW3020CCS-DB EVB3020A EVB3020A-IFBD Evaluation Board Interface Board Description GSM Transceiver Package 64TQFPT Bulk 64TQFPT Dry Pack Evaluation Board Interface Kit Comcode 108417734 108417742 108100611 108100629
Note: Contact your Lucent Technologies Microelectronics Group Account Manager for minimum order requirements.
For additional information, contact your Microelectronics Group Account Manager or the following: INTERNET: http://www.lucent.com/micro E-MAIL: docmaster@micro.lucent.com N. AMERICA Microelectronics Group, Lucent Technologies Inc., 555 Union Boulevard, Room 30L-15P-BA, Allentown, PA 18103 1-800-372-2447, FAX 610-712-4106 (In CANADA: 1-800-553-2448, FAX 610-712-4106) ASIA PACIFIC: Microelectronics Group, Lucent Technologies Singapore Pte. Ltd., 77 Science Park Drive, #03-18 Cintech III, Singapore 118256 Tel. (65) 778 8833, FAX (65) 777 7495 CHINA: Microelectronics Group, Lucent Technologies (China) Co., Ltd., A-F2, 23/F, Zao Fong Universe Building, 1800 Zhong Shan Xi Road, Shanghai 200233 P.R. China Tel. (86) 21 6440 0468, ext. 316, FAX (86) 21 6440 0652 JAPAN: Microelectronics Group, Lucent Technologies Japan Ltd., 7-18, Higashi-Gotanda 2-chome, Shinagawa-ku, Tokyo 141, Japan Tel. (81) 3 5421 1600, FAX (81) 3 5421 1700 EUROPE: Data Requests: MICROELECTRONICS GROUP DATALINE: Tel. (44) 7000 582 368, FAX (44) 1189 328 148 Technical Inquiries: GERMANY: (49) 89 95086 0 (Munich), UNITED KINGDOM: (44) 1344 865 900 (Ascot), FRANCE: (33) 1 40 83 68 00 (Paris), SWEDEN: (46) 8 594 607 00 (Stockholm), FINLAND: (358) 9 4354 2800 (Helsinki), ITALY: (39) 02 6608131 (Milan), SPAIN: (34) 1 807 1441 (Madrid)
Lucent T echnologies Inc. reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such product(s) or information.
Copyright (c) 1999 Lucent Technologies Inc. All Rights Reserved Printed in U.S.A.
December 1999 DS98-070WTEC

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